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1. general description the pca9551 led blinker blinks leds in i 2 c-bus and smbus applications where it is necessary to limit bus traf?c or free up the i 2 c-bus master's (mcu, mpu, dsp, chip set, etc.) timer. the uniqueness of this device is the internal oscillator with two programmable blink rates. to blink leds using normal i/o expanders like the pcf8574 or pca9554, the bus master must send repeated commands to turn the led on and off. this greatly increases the amount of traf?c on the i 2 c-bus and uses up one of the master's timers. the pca9551 led blinker instead requires only the initial set-up command to program blink rate 1 and blink rate 2 (i.e., the frequency and duty cycle) for each individual output. from then on, only one command from the bus master is required to turn each individual open-drain output on, off, or to cycle at blink rate 1 or blink rate 2. maximum output sink current is 25 ma per bit and 100 ma per package. any bits not used for controlling the leds can be used for general purpose parallel input/output (gpio) expansion. the active low hardware reset pin ( reset) and power-on reset (por) initializes the registers to their default state, all zeroes, causing the bits to be set high (led off). three hardware address pins on the pca9551 allow eight devices to operate on the same bus. 2. features n 8 led drivers (on, off, ?ashing at a programmable rate) n 2 selectable, fully programmable blink rates (frequency and duty cycle) between 0.148 hz and 38 hz (6.74 seconds and 0.026 seconds) n input/outputs not used as led drivers can be used as regular gpios n internal oscillator requires no external components n i 2 c-bus interface logic compatible with smbus n internal power-on reset n noise ?lter on scl/sda inputs n active low reset input n 8 open-drain outputs directly drive leds to 25 ma n edge rate control on outputs n no glitch on power-up n supports hot insertion n low standby current n operating power supply voltage range of 2.3 v to 5.5 v n 0 hz to 400 khz clock frequency pca9551 8-bit i 2 c-bus led driver with programmable blink rates rev. 06 7 november 2006 product data sheet
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 2 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates n esd protection exceeds 2000 v hbm per jesd22-a114, 150 v mm per jesd22-a115 and 1000 v cdm per jesd22-c101 n latch-up testing is done to jedec standard jesd78 which exceeds 100 ma n packages offered: so16, tssop16, hvqfn16 (4 mm 4 mm and 3 mm 3mm versions) 3. ordering information 4. block diagram table 1. ordering information t amb = - 40 c to +85 c. type number topside mark package name description version pca9551d pca9551d so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 pca9551pw pca9551 tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 pca9551bs 9551 hvqfn16 plastic thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 4 4 0.85 mm sot629-1 PCA9551BS3 p51 hvqfn16 plastic thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 3 3 0.85 mm sot758-1 only one i/o shown for clarity. fig 1. block diagram of pca9551 a0 a1 a2 002aac504 i 2 c-bus control input filters pca9551 power-on reset scl sda v dd v ss ledn reset oscillator prescaler 1 register prescaler 0 register pwm1 register pwm0 register input register led select (lsn) register blink0 blink1 0 1
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 3 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 5. pinning information 5.1 pinning 5.2 pin description fig 2. pin con?guration for so16 fig 3. pin con?guration for tssop16 fig 4. pin con?guration for hvqfn16 (sot629-1) fig 5. pin con?guration for hvqfn16 (sot758-1) v dd sda scl reset led7 led6 led5 led4 a0 a1 a2 led0 led1 led2 led3 v ss pca9551d 002aac500 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 v dd sda scl reset led7 led6 led5 led4 a0 a1 a2 led0 led1 led2 led3 v ss pca9551pw 002aac501 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 002aac502 pca9551bs transparent top view led2 led6 led1 led7 led0 reset a2 scl led3 v ss led4 led5 a1 a0 v dd sda 4 9 3 10 2 11 1 12 5 6 7 8 16 15 14 13 terminal 1 index area 002aac503 PCA9551BS3 transparent top view led2 led6 led1 led7 led0 a2 scl led3 v ss led4 led5 a1 a0 v dd sda 4 9 3 10 2 11 1 12 5 6 7 8 16 15 14 13 terminal 1 index area reset table 2. pin description symbol pin description so16, tssop16 hvqfn16 a0 1 15 address input 0 a1 2 16 address input 1 a2 3 1 address input 2 led0 4 2 led driver 0 led1 5 3 led driver 1 led2 6 4 led driver 2 led3 7 5 led driver 3 v ss 86 [1] supply ground led4 9 7 led driver 4 led5 10 8 led driver 5
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 4 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates [1] hvqfn package die supply ground is connected to both v ss pin and exposed center pad. v ss pin must be connected to supply ground for proper device operation. for enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the pcb in the thermal pad region. 6. functional description refer to figure 1 bloc k diag r am of pca9551 . 6.1 device address following a start condition, the bus master must output the address of the slave it is accessing. the address of the pca9551 is shown in figure 6 . to conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled high or low. the last bit of the address byte de?nes the operation to be performed. when set to logic 1 a read is selected, while a logic 0 selects a write operation. 6.2 control register following the successful acknowledgement of the slave address, the bus master will send a byte to the pca9551, which will be stored in the control register. led6 11 9 led driver 6 led7 12 10 led driver 7 reset 13 11 reset input (active low) scl 14 12 serial clock line sda 15 13 serial data line v dd 16 14 supply voltage table 2. pin description continued symbol pin description so16, tssop16 hvqfn16 fig 6. pca9551 slave address 002aac505 1 1 0 0 a2 a1 a0 r/w fixed slave address hardware selectable reset state: 00h fig 7. control register 002aac506 0 0 0 ai 0 b2 b1 b0 register address auto-increment flag
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 5 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates the lowest 3 bits are used as a pointer to determine which register will be accessed. if the auto-increment (ai) ?ag is set, the three low order bits of the control register are automatically incremented after a read or write. this allows the user to program the registers sequentially. the contents of these bits will rollover to 000 after the last register is accessed. when the auto-increment ?ag is set (ai = 1) and a read sequence is initiated, the sequence must start by reading a register different from 0' (b2 b1 b0 1 000). only the 3 least signi?cant bits are affected by the ai ?ag. unused bits must be programmed with zeroes. 6.2.1 control register de?nition 6.3 register descriptions 6.3.1 input - input register the input register re?ects the state of the device pins. writes to this register will be acknowledged but will have no effect. remark: the default value x is determined by the externally applied logic level (normally logic 1) when used for directly driving led with pull-up to v dd . 6.3.2 pcs0 - frequency prescaler 0 psc0 is used to program the period of the pwm output. the period of blink0 = (psc0 + 1) / 38. remark: prescaler calculation is different between the pca9551 and other pca955x led blinkers. a divider ratio of 38 instead of 44 is used. this different divider ratio causes the blinking frequency to be 13 % (1 - 38 / 44) lower when the same 8-bit word is used. the programmed value of frequency prescaler 0 must be adjusted to compensate for this difference in applications where the pca9551 is used in conjunction with other pca955x led blinkers and the observed blinking frequencies need to be the same. table 3. register summary b2 b1 b0 symbol access description 0 0 0 input read only input register 0 0 1 psc0 read/write frequency prescaler 0 0 1 0 pwm0 read/write pwm register 0 0 1 1 psc1 read/write frequency prescaler 1 1 0 0 pwm1 read/write pwm register 1 1 0 1 ls0 read/write led0 to led3 selector 1 1 0 ls1 read/write led4 to led7 selector table 4. input - input register description bit 7 6 5 4 3 2 1 0 symbol led7 led6 led5 led4 led3 led2 led1 led0 default xxxxxxxx
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 6 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 6.3.3 pwm0 - pulse width modulation 0 the pwm0 register determines the duty cycle of blink0. the outputs are low (led off) when the count is less than the value in pwm0 and high when it is greater. if pwm0 is programmed with 00h, then the pwm0 output is always low. the duty cycle of blink0 = (256 - pwm0) / 256. 6.3.4 pcs1 - frequency prescaler 1 psc1 is used to program the period of the pwm output. the period of blink1 = (psc1 + 1) / 38. remark: prescaler calculation is different between the pca9551 and other pca955x led blinkers. a divider ratio of 38 instead of 44 is used. this different divider ratio causes the blinking frequency to be 13 % (1 - 38 / 44) lower when the same 8-bit word is used. the programmed value of frequency prescaler 1 must be adjusted to compensate for this difference in applications where the pca9551 is used in conjunction with other pca955x led blinkers and the observed blinking frequencies need to be the same. 6.3.5 pwm1 - pulse width modulation 1 the pwm1 register determines the duty cycle of blink1. the outputs are low (led off) when the count is less than the value in pwm1 and high when it is greater. if pwm1 is programmed with 00h, then the pwm1 output is always low (led off). the duty cycle of blink1 = (256 - pwm1) / 256. table 5. psc0 - frequency prescaler 0 register description bit 7 6 5 4 3 2 1 0 symbol psc0[7] psc0[6] psc0[5] psc0[4] psc0[3] psc0[2] psc0[1] psc0[0] default 11111111 table 6. pwm0 - pulse width modulation 0 register description bit 7 6 5 4 3 2 1 0 symbol pwm0 [7] pwm0 [6] pwm0 [5] pwm0 [4] pwm0 [3] pwm0 [2] pwm0 [1] pwm0 [0] default 10000000 table 7. psc1 - frequency prescaler 1 register description bit 7 6 5 4 3 2 1 0 symbol psc1[7] psc1[6] psc1[5] psc1[4] psc1[3] psc1[2] psc1[1] psc1[0] default 11111111 table 8. pwm1 - pulse width modulation 1 register description bit 7 6 5 4 3 2 1 0 symbol pwm1 [7] pwm1 [6] pwm1 [5] pwm1 [4] pwm1 [3] pwm1 [2] pwm1 [1] pwm1 [0] default 10000000
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 7 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 6.3.6 ls0 to ls1 - led selector registers the lsn led select registers determine the source of the led data. 00 = output is set low (led on) 01 = output is set high-impedance (led off; default) 10 = output blinks at pwm0 rate 11 = output blinks at pwm1 rate 6.4 pins used as gpios led pins not used to control leds can be used as general purpose i/os (gpios). for use as input, set ledn to high-impedance (01) and then read the pin state via the input register. for use as output, connect external pull-up resistor to the pin and size it according to the dc recommended operating characteristics. ledn output pin is high when the output is programmed as high-impedance, and low when the output is programmed low through the led selector register. the output can be pulse-width controlled when pwm0 or pwm1 are used. 6.5 power-on reset when power is applied to v dd , an internal power-on reset (por) holds the pca9551 in a reset condition until v dd has reached v por . at that point, the reset condition is released and the pca9551 registers are initialized to their default states, all the outputs in the off state. thereafter, v dd must be lowered below 0.2 v to reset the device. 6.6 external reset a reset can be accomplished by holding the reset pin low for a minimum of t w(rst) . the pca9551 registers and i 2 c-bus state machine will be held in their default states until the reset input is once again high. this input requires a pull-up resistor to v dd if no active connection is used. table 9. ls0 to ls1 - led selector registers bit description legend: * default value. register bit value description ls0 - led0 to led3 selector ls0 7:6 01* led3 selected 5:4 01* led2 selected 3:2 01* led1 selected 1:0 01* led0 selected ls1 - led4 to led7 selector ls1 7:6 01* led7 selected 5:4 01* led6 selected 3:2 01* led5 selected 1:0 01* led4 selected
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 8 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 7. characteristics of the i 2 c-bus the i 2 c-bus is for 2-way, 2-line communication between different ics or modules. the two lines are a serial data line (sda) and a serial clock line (scl). both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. data transfer may be initiated only when the bus is not busy. 7.1 bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see figure 8 ). 7.1.1 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low transition of the data line while the clock is high is de?ned as the start condition (s). a low-to-high transition of the data line while the clock is high is de?ned as the stop condition (p) (see figure 9 .) 7.2 system con?guration a device generating a message is a transmitter; a device receiving is the receiver. the device that controls the message is the master and the devices which are controlled by the master are the slaves (see figure 10 ). fig 8. bit transfer mba607 data line stable; data valid change of data allowed sda scl fig 9. de?nition of start and stop conditions mba608 sda scl p stop condition sda scl s start condition
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 9 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 7.3 acknowledge the number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. each byte of eight bits is followed by one acknowledge bit. the acknowledge bit is a high level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed must generate an acknowledge after the reception of each byte. also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. the device that acknowledges has to pull down the sda line during the acknowledge clock pulse, so that the sda line is stable low during the high period of the acknowledge related clock pulse; set-up and hold times must be taken into account. a master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this event, the transmitter must leave the data line high to enable the master to generate a stop condition. fig 10. system con?guration 002aaa966 master transmitter/ receiver slave receiver slave transmitter/ receiver master transmitter master transmitter/ receiver sda scl i 2 c-bus multiplexer slave fig 11. acknowledgement on the i 2 c-bus 002aaa987 s start condition 9 8 2 1 clock pulse for acknowledgement not acknowledge acknowledge data output by transmitter data output by receiver scl from master
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 10 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 7.4 bus transactions fig 12. write to register 0 a s slave address start condition r/w acknowledge from slave 002aac507 0 0 ai 0 b2b1b0 0 command byte a acknowledge from slave 12345678 scl 9 sda data 1 a write to register data out from port t v(q) acknowledge from slave data 1 valid data to register 1 0 0 a2 a1 a0 1 fig 13. read from register 1 0 0 a2 a1 a0 0 a s1 start condition r/w acknowledge from slave 002aac508 a acknowledge from slave sda a p acknowledge from master data from register data (first byte) slave address stop condition s (repeated) start condition (cont.) (cont.) 1 a r/w acknowledge from slave slave address at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter na no acknowledge from master data from register data (last byte) command byte 0 0 ai 0 b2 b1 0b0 auto-increment register address if ai = 1 1 0 0 a2 a1 a0 1 remark: this ?gure assumes the command byte has previously been programmed with 00h. fig 14. read input port register 1 0 0 a2 a1 a0 1 a s1 start condition r/w acknowledge from slave 002aac509 a acknowledge from master sda na read from port data into port p t h(d) data from port no acknowledge from master data from port data 4 slave address data 1 stop condition data 2 data 3 data 4 t su(d)
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 11 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 8. application design-in information 8.1 minimizing i dd when the i/os are used to control leds when the i/os are used to control leds, they are normally connected to v dd through a resistor as shown in figure 15 . since the led acts as a diode, when the led is off the i/o v i is about 1.2 v less than v dd . the supply current, i dd , increases as v i becomes lower than v dd and is speci?ed as d i dd in t ab le 12 static char acter istics . designs needing to minimize current consumption, such as battery power applications, should consider maintaining the i/o pins greater than or equal to v dd when the led is off. figure 16 shows a high value resistor in parallel with the led. figure 17 shows v dd less than the led supply voltage by at least 1.2 v. both of these methods maintain the i/o v i at or above v dd and prevents additional supply current consumption when the led is off. led0 to led5 are used as led drivers. led6 and led7 are used as regular gpios. fig 15. typical application pca9551 led0 led1 sda scl reset 5 v i 2 c-bus/smbus master 002aac510 sda scl v dd a2 a1 a0 v ss 5 v 10 k w led2 led3 led4 led5 led6 led7 gpios 10 k w 10 k w fig 16. high value resistor in parallel with the led fig 17. device supplied by a lower voltage 002aac189 led v dd ledn 100 k w v dd 002aac190 led v dd ledn 3.3 v 5 v
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 12 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 8.2 programming example the following example will show how to set led0 to led3 on. it will then set led4 and led5 to blink at 1 hz at a 50 % duty cycle. led6 and led7 will be set to blink at 4 hz and at a 25 % duty cycle. 9. limiting values table 10. programming pca9551 program sequence i 2 c-bus start s pca9551 address with a0 to a2 = low c0h psc0 subaddress + auto-increment 11h set prescaler psc0 to achieve a period of 1 second: psc0 = 37 25h set pwm0 duty cycle to 50 %: pwm0 = 128 80h set prescaler pcs1 to achieve a period of 0.25 seconds: psc1 = 9 09h set pwm1 output duty cycle to 25 %: pwm1 = 192 c0h set led0 to led3 on 00h set led4 and led5 to pwm0, and led6 or led7 to pwm1 fah stop p blink period 1 psc0 1 + 38 ----------------------- - == 256 pwm0 C 256 -------------------------------- 0.5 = blink period 0.25 psc1 1 + 38 ----------------------- - == 256 pwm1 C 256 -------------------------------- 0.25 = table 11. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage - 0.5 +6.0 v v i/o voltage on an input/output pin v ss - 0.5 5.5 v i o(ledn) output current on pin ledn - 25 ma i ss ground supply current - 100 ma p tot total power dissipation - 400 mw t stg storage temperature - 65 +150 c t amb ambient temperature operating - 40 +85 c
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 13 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 10. static characteristics [1] typical limits at v dd = 3.3 v, t amb =25 c. [2] v dd must be lowered to 0.2 v in order to reset part. [3] each i/o must be externally limited to a maximum of 25 ma and the device must be limited to a maximum current of 100 ma. table 12. static characteristics v dd = 2.3 v to 5.5 v; v ss =0v; t amb = - 40 c to +85 c; unless otherwise speci?ed. symbol parameter conditions min typ [1] max unit supplies v dd supply voltage 2.3 - 5.5 v i dd supply current operating mode; v dd = 5.5 v; v i =v dd or v ss ; f scl = 100 khz - 350 500 m a i stb standby current standby mode; v dd = 5.5 v; v i =v dd or v ss ; f scl = 0 khz - 1.9 3.0 m a d i dd additional quiescent supply current standby mode; v dd = 5.5 v; every led i/o at v i = 4.3 v; f scl = 0 khz - - 800 m a v por power-on reset voltage no load; v i =v dd or v ss [2] - 1.7 2.2 v input scl; input/output sda v il low-level input voltage - 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd - 5.5 v i ol low-level output current v ol = 0.4 v 3 6.5 - ma i l leakage current v i =v dd =v ss - 1- +1 m a c i input capacitance v i =v ss - 3.7 5 pf i/os v il low-level input voltage - 0.5 - +0.8 v v ih high-level input voltage 2.0 - 5.5 v i ol low-level output current v ol = 0.4 v v dd = 2.3 v [3] 69- ma v dd = 3.0 v [3] 811- ma v dd = 5.0 v [3] 10 14 - ma v ol = 0.7 v v dd = 2.3 v [3] 11 14 - ma v dd = 3.0 v [3] 14 18 - ma v dd = 5.0 v [3] 17 24 - ma i l input leakage current v dd = 3.6 v; v i = 0 v or v dd - 1- +1 m a c io input/output capacitance - 2.1 5 pf select inputs a0, a1, a2; reset v il low-level input voltage - 0.5 - +0.8 v v ih high-level input voltage a0; reset 2.0 - 5.5 v a1; a2 2.0 - v dd + 0.5 v i li input leakage current - 1- +1 m a c i input capacitance - 2.3 5 pf
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 14 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates (1) maximum (2) average (3) minimum (1) maximum (2) average (3) minimum fig 18. typical frequency variation over process at v dd = 2.3 v to 3.0 v fig 19. typical frequency variation over process at v dd = 3.0 v to 5.5 v - 20 % 0 % 20 % percent variation - 40 % t amb ( c) - 40 100 - 20 002aac191 0 20406080 (2) (1) (3) - 20 % 0 % 20 % percent variation - 40 % t amb ( c) - 40 100 - 20 002aac192 0 20406080 (1) (2) (3)
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 15 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 11. dynamic characteristics [1] t vd;ack = time for acknowledgement signal from scl low to sda (out) low. [2] t vd;dat = minimum time for sda data output to be valid following scl low. [3] c b = total capacitance of one bus line in pf. [4] resetting the device while actively communicating on the bus may cause glitches or errant stop conditions. [5] upon reset, the full delay will be the sum of t rst and the rc time constant of the sda bus. table 13. dynamic characteristics symbol parameter conditions standard-mode i 2 c-bus fast-mode i 2 c-bus unit min max min max f scl scl clock frequency 0 100 0 400 khz t buf bus free time between a stop and start condition 4.7 - 1.3 - m s t hd;sta hold time (repeated) start condition 4.0 - 0.6 - m s t su;sta set-up time for a repeated start condition 4.7 - 0.6 - m s t su;sto set-up time for stop condition 4.0 - 0.6 - m s t hd;dat data hold time 0 - 0 - ns t vd;ack data valid acknowledge time [1] - 600 - 600 ns t vd;dat data valid time low-level [2] - 600 - 600 ns high-level [2] - 1500 - 600 ns t su;dat data set-up time 250 - 100 - ns t low low period of the scl clock 4.7 - 1.3 - m s t high high period of the scl clock 4.0 - 0.6 - m s t r rise time of both sda and scl signals - 1000 20 + 0.1c b [3] 300 ns t f fall time of both sda and scl signals - 300 20 + 0.1c b [3] 300 ns t sp pulse width of spikes that must be suppressed by the input ?lter - 50 - 50 ns port timing t v(q) data output valid time - 200 - 200 ns t su(d) data input setup time 100 - 100 - ns t h(d) data input hold time 1 - 1 - m s reset t w(rst) reset pulse width 6 - 6 - ns t rec(rst) reset recovery time 0 - 0 - ns t rst reset time [4] [5] 400 - 400 - ns
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 16 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates fig 20. de?nition of reset timing sda scl 002aac193 t rst 50 % 30 % 50 % 50 % 50 % t rec(rst) t w(rst) reset ledn led off start t rst ack or read cycle fig 21. de?nition of timing t sp t buf t hd;sta p p s t low t r t hd;dat t f t high t su;dat t su;sta sr t hd;sta t su;sto sda scl 002aaa986
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 17 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 12. test information rise and fall times refer to v il and v ih . fig 22. i 2 c-bus timing diagram scl sda t hd;sta t su;dat t hd;dat t f t buf t su;sta t low t high t vd;ack 002aab175 t su;sto protocol start condition (s) bit 7 msb (a7) bit 6 (a6) bit 0 (r/w) acknowledge (a) stop condition (p) 1 /f scl t r t vd;dat r l = load resistor for ledn. r l for sda and scl > 1 k w (3 ma or less current). c l = load capacitance includes jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generators. fig 23. test circuitry for switching times pulse generator v o c l 50 pf r l 500 w 002aab880 r t v i v dd dut v dd open v ss
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 18 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 13. package outline fig 24. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 19 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates fig 25. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 20 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates fig 26. package outline sot629-1 (hvqfn16) terminal 1 index area 0.65 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 4.1 3.9 d h 2.25 1.95 y 1 4.1 3.9 2.25 1.95 e 1 1.95 e 2 1.95 0.38 0.23 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot629-1 mo-220 - - - - - - 0.75 0.50 l 0.1 v 0.05 w 0 2.5 5 mm scale sot629-1 hvqfn16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 58 16 13 12 9 4 1 x d e c b a e 2 01-08-08 02-10-22 terminal 1 index area 1/2 e 1/2 e a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 21 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates fig 27. package outline sot758-1 (hvqfn16) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.1 2.9 d h 1.75 1.45 y 1 3.1 2.9 1.75 1.45 e 1 1.5 e 2 1.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot758-1 mo-220 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot758-1 hvqfn16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 3 x 3 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 58 16 13 12 9 4 1 x d e c b a e 2 02-03-25 02-10-21 terminal 1 index area 1/2 e 1/2 e a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 22 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 14. handling information inputs and outputs are protected against electrostatic discharge in normal handling. however, to be completely safe you must take normal precautions appropriate to handling integrated circuits. 15. soldering this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 surface mount re?ow soldering description . 15.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electrical circuits. the soldered joint provides both the mechanical and the electrical connection. there is no single soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for ?ne pitch smds. re?ow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 15.2 wave and re?ow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. the re?ow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature pro?le. leaded packages, packages with solder balls, and leadless packages are all re?ow solderable. key characteristics in both wave and re?ow soldering are: ? board speci?cations, including the board ?nish, solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivity level of the packages ? package placement ? inspection and repair ? lead-free soldering versus pbsn soldering 15.3 wave soldering key characteristics in wave soldering are:
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 23 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates ? process issues, such as application of adhesive and ?ux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath speci?cations, including temperature and impurities 15.4 re?ow soldering key characteristics in re?ow soldering are: ? lead-free versus snpb soldering; note that a lead-free re?ow process usually leads to higher minimum peak temperatures (see figure 28 ) than a pbsn process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? re?ow temperature pro?le; this pro?le includes preheat, re?ow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classi?ed in accordance with t ab le 14 and 15 moisture sensitivity precautions, as indicated on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during re?ow soldering, see figure 28 . table 14. snpb eutectic process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 3 350 < 2.5 235 220 3 2.5 220 220 table 15. lead-free process (from j-std-020c) package thickness (mm) package re?ow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 24 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates for further information on temperature pro?les, refer to application note an10365 surface mount re?ow soldering description . 16. abbreviations msl: moisture sensitivity level fig 28. temperature pro?les for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature table 16. abbreviations acronym description cdm charged device model dsp digital signal processor dut device under test esd electrostatic discharge gpio general purpose input/output hbm human body model i 2 c-bus inter-integrated circuit bus led light emitting diode mcu microcontroller mm machine model mpu microprocessor por power-on reset rc resistor-capacitor network smbus system management bus
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 25 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 17. revision history table 17. revision history document id release date data sheet status change notice supersedes pca9551_6 20061107 product data sheet - pca9551_5 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? added hvqfn16 (sot758-1) package offering ? t ab le 2 pin descr iption : added t ab le note 1 and its reference at hvqfn pin 6 ? section 6.3.3 pwm0 - pulse width modulation 0 , ?rst paragraph, second sentence: changed from the outputs are high (led off) ... to the outputs are low (led off) ... ? section 6.6 exter nal reset , ?rst sentence: changed symbol t w to t w(rst) ? symbol t pv and t pv changed to t v(q) ? symbol t ph and t ph changed to t h(d) ? symbol t ps and t ps changed to t su(d) ? t ab le 11 limiting v alues : changed i i/o , dc output current on an i/o to i o(ledn) , output current on pin ledn ? t ab le 12 static char acter istics : changed parameter description of d i dd from additional standby current to additional quiescent supply current ? symbol t rec changed to t rec(rst) ? symbol t reset changed to t rst ? added section 16 ab bre viations pca9551_5 (9397 750 13726) 20041001 product data sheet - pca9551_4 pca9551_4 (9397 750 11462) 20030505 product data 853-2343 29858 (20030424) pca9551_3 pca9551_3 (9397 750 11155) 20030220 product data 853-2343 29331 (20021220) pca9551_2 pca9551_2 (9397 750 10328) 20020927 product data 853-2343 28878 (20020909) pca9551_1 pca9551_1 (9397 750 10104) 20020513 product data - -
pca9551_6 ? nxp b.v. 2006. all rights reserved. product data sheet rev. 06 7 november 2006 26 of 27 nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates 18. legal information 18.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 18.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 18.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 18.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. i 2 c-bus logo is a trademark of nxp b.v. 19. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors pca9551 8-bit i 2 c-bus led driver with programmable blink rates ? nxp b.v. 2006. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 7 november 2006 document identifier: pca9551_6 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 20. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 functional description . . . . . . . . . . . . . . . . . . . 4 6.1 device address . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 control register . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2.1 control register de?nition . . . . . . . . . . . . . . . . . 5 6.3 register descriptions . . . . . . . . . . . . . . . . . . . . 5 6.3.1 input - input register. . . . . . . . . . . . . . . . . . . . 5 6.3.2 pcs0 - frequency prescaler 0 . . . . . . . . . . . . . 5 6.3.3 pwm0 - pulse width modulation 0 . . . . . . . . . . 6 6.3.4 pcs1 - frequency prescaler 1 . . . . . . . . . . . . . 6 6.3.5 pwm1 - pulse width modulation 1 . . . . . . . . . . 6 6.3.6 ls0 to ls1 - led selector registers . . . . . . . . . 7 6.4 pins used as gpios . . . . . . . . . . . . . . . . . . . . . 7 6.5 power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.6 external reset . . . . . . . . . . . . . . . . . . . . . . . . 7 7 characteristics of the i 2 c-bus. . . . . . . . . . . . . . 8 7.1 bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7.1.1 start and stop conditions . . . . . . . . . . . . . . 8 7.2 system con?guration . . . . . . . . . . . . . . . . . . . . 8 7.3 acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7.4 bus transactions . . . . . . . . . . . . . . . . . . . . . . . 10 8 application design-in information . . . . . . . . . 11 8.1 minimizing i dd when the i/os are used to control leds . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8.2 programming example . . . . . . . . . . . . . . . . . . 12 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 12 10 static characteristics. . . . . . . . . . . . . . . . . . . . 13 11 dynamic characteristics . . . . . . . . . . . . . . . . . 15 12 test information . . . . . . . . . . . . . . . . . . . . . . . . 17 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 14 handling information. . . . . . . . . . . . . . . . . . . . 22 15 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 15.1 introduction to soldering . . . . . . . . . . . . . . . . . 22 15.2 wave and re?ow soldering . . . . . . . . . . . . . . . 22 15.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 22 15.4 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . 23 16 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24 17 revision history . . . . . . . . . . . . . . . . . . . . . . . . 25 18 legal information . . . . . . . . . . . . . . . . . . . . . . 26 18.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 26 18.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 18.3 disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 26 18.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 26 19 contact information . . . . . . . . . . . . . . . . . . . . 26 20 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

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